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Trace PS1 GTE inputs, fixed-point transforms, command timing, saturation, and FLAG summaries without replacing guest arithmetic with host floats.
Inspect the Saturn SCU DSP's small Harvard-style memories, instruction buses, multiply-accumulate path, program loading, and cycle-aware emulator tests.
Trace the SNES SA-1's two CPU views, shared work RAM, interrupt flags, arithmetic hardware, DMA paths, and deterministic bus-visible synchronization.
Model the SNES Super FX as an executing cartridge processor, tracing its R0-R15 state, program and data banks, cache, pixel operations, and CPU-visible timing.