tag

#nes

5 posts

RetrogamingDeep Dive October 4, 2026 8 min read

NES Controller Serial Strobe: Latching, Port Reads, and Open-Bus Bits

Implement NES controller reads as a shared strobe and two timed serial ports, preserving button order, open-bus lines, device variants, and DMA edge cases.

#nes#famicom#controller

RetrogamingDeep Dive October 4, 2026 8 min read

NES MMC3 IRQ Counter: PPU A12 Edges, Reloads, and Mapper Variants

Trace MMC3 IRQs from filtered PPU A12 transitions through latch reloads, counter decrements, enable and acknowledge writes, and board-specific timing differences.

#nes#mmc3#mapper-irq

RetrogamingDeep Dive October 4, 2026 7 min read

NES PPU Sprite Evaluation: Secondary OAM, Overflow Bug, and Fetch Timing

Follow NES sprite evaluation from primary OAM through eight secondary slots, the diagonal overflow bug, sprite fetches, and scanline-visible state.

#nes#ppu#sprites

RetrogamingDeep Dive October 3, 2026 8 min read

NES APU Timing: DMC DMA, Frame Sequencing, and CPU Bus Side Effects

Trace NES DMC sample fetches, APU frame events, OAM-DMA contention, and controller-read glitches with cycle-aware emulator models and tests.

#nes#apu#dmc

RetrogamingDeep Dive October 3, 2026 7 min read

NES PPU VBlank and NMI Timing: Model the Event, Not Just the Frame

A timing-focused guide to NES VBlank status, PPUCTRL NMI gating, PPUSTATUS reads, regional timing, races, and emulator validation.

#nes#ppu#nmi