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8 posts
Understand SNES auto-joypad enable and busy flags, four result words, bit ordering, VBlank sampling, and when software must switch to manual polling.
Trace the SNES SA-1's two CPU views, shared work RAM, interrupt flags, arithmetic hardware, DMA paths, and deterministic bus-visible synchronization.
Explore the SNES S-DD1 decompressor's adaptive bitstream state, cartridge mapping, DMA flow, and reproducible tests for graphics corruption.
Trace SNES echo from voice routing through the ESA/EDL ring buffer, eight-tap FIR, signed feedback, write inhibition, and DSP-to-ARAM timing.
Model the SNES Super FX as an executing cartridge processor, tracing its R0-R15 state, program and data banks, cache, pixel operations, and CPU-visible timing.
Understand SNES horizontal-blank DMA table entries, transfer patterns, channel state, and the VBlank discipline needed for deterministic raster effects.
Understand SNES Mode 7 fixed-point transforms, center offsets, map-boundary behavior, mosaic, and why per-line effects need raster-aware emulation.
Load an SPC700 program through the SNES APU ports with the IPL handshake, byte acknowledgements, safe address bounds, timeout handling, and emulator tests.